For TWR-VF65GS10-PRO (Freescale Vybrid VF6xx) with 2nd core loader for eCOS 3.0 lauch.
The Vybrid VFxxx family features a heterogeneous dual-core solution that combines the ARM® Cortex™-A5 and Cortex™-M4 cores. The family also features dual USB 2.0 OTG controllers with integrated PHY, dual 10/100 Ethernet controllers with L2 switch, up to 1.5 MB of on-chip SRAM and a rich suite of communication, connectivity and human-machine interfaces (HMI). In addition, anti-clone, anti-tamper, secure boot and advanced encryption hardware deliver the highest level of security and accuracy.
We start to work with ARM DS-5 Starter Kit for Vybrid Controllers and debug with CMSIS-DAP on OpenSDA K20 controller. We found problem in ARM DS-5 Starter Kit for Vybrid Controllers “vf65gs10_a5_ddr.ds” script: wrong DDR3 initialization is the script. Guys from Freescale share new script with improved DDR3 ZQ calibration.
Some EBOOT init code was done and tested in Eclipse + ARM GNU tools + JTAG adapter:
We also investigate IVT for Cortex-A5 booting and implement it in EBOOT for NAND, QSPI and SD booting. Finally EBOOT boots from SD card (UART console output):
We implement basic OAL functions and NK.bin starts successfully (UART console output):
After, we add display functionality to EBOOT and now EBOOT able to show boot progress.
Now bootloader fills with all necessary functionality like saving configuration to flash, boot from flash, write image to flash storage and more (UART console output):
We plan to launch basic OS functionality. After learning Security Reference Manual for Vybrid processors, we understand that SNVS module gives us not too convenient time for RTC kernel functions. SNVS gives us only number of 32kHz ticks. So, we just made time conversation module, which converts current date and time to number of seconds since 1th of January 1970. Similar block implemented in Linux BSP for Vybrid processor. Display subsystem was implemented by us with using number of layers (basic layer, DirectDraw layer, cursor layer and reserved layers for future use). It allows starting XAML-based applications (Microsoft Silverlight 3). And finally our OS image shows own desktop on LCD screen and we able to use touchscreen.
Yahooooo!!! Our current OS design workspace in Visual Studio.
A lot of work with drivers implementing.
2 groups of developers in Belarus, Minsk and Belgium, Aartselar were working under driver’s development
A lot of communication and online meetings… and finally we got full BSP package (list in Visual Studio environment).
And finally, we need to launch eCOS 3.0 realtime operating system on second core in Vybrid processor. We know that exist eCOS 3.0 port for Vybrid processor from Freescale, but on this moment it not in mainstream of eCOS 3.0 repository and only in review state. So we fixed some bugs in Vybrid eCOS BSP and its starts from Vybrid internal SRAM memory simultaneously with WEC2013 (console output from eCOS debug UART).
Small HMI with logic unit can be implemented on Freescale Vybrid SoC with WEC2013+eCOS as software solution
- 1st core ARM Cortex-A5 with Windows Embedded Compact 2013 used for displaying current parameters of the system, communicate with host servers by LAN and give access to user interface by personnel RFID identification card (Also able to start CoDeSys environment on A5 core under WEC2013);
- 2nd core ARM Cortex-M4 with eCOS 3.0 RTOS used for business-logic: communication with sensors (Modbus RTU by RS232/RS485, Zigbee sensor network), control operations and etc. Special Security Zone (SZ) was done with number of highly stable eCOS 3.0 drivers (UART, I2C, SPI, PWM). Also SZ use double protection from lock-ups, so eCOS 3.0 still stable and run while one of external sensors is not respond and/or communication channel is damaged.
- Display with touch screen gives ability to maintain the local system;
- RFID reader able to protect system from unauthorized access;
- Ethernet is used for communication with SCADA on host system.